;===================================================================;
;                                                                   ;
;   W E I T E K    1 1 6 7    D E S C R I P T I O N S               ;
;                                                                   ;
;   Copyright (C) 1988, 1989 Farpoint Engineering                   ;
;                                                                   ;
;===================================================================;

;
;   Weitek 1167
;
WTL_BASE        equ     0c0000000h

;
;   segment register
;
wASSUME     macro       reg
            ifidn       <reg>,<ds>
_wSreg      =           0
            endif
            ifidn       <reg>,<es>
_wSreg      =           1
            endif
            ifidn       <reg>,<fs>
_wSreg      =           2
            endif
            ifidn       <reg>,<gs>
_wSreg      =           3
            endif
            endm

        wASSUME     fs


;
;   registers
;
R0      equ     0
R1      equ     1
R2      equ     2
R3      equ     3
R4      equ     4
R5      equ     5
R6      equ     6
R7      equ     7
R8      equ     8
R9      equ     9
R10     equ     10
R11     equ     11
R12     equ     12
R13     equ     13
R14     equ     14
R15     equ     15
R16     equ     16
R17     equ     17
R18     equ     18
R19     equ     19
R20     equ     20
R21     equ     21
R22     equ     22
R23     equ     23
R24     equ     24
R25     equ     25
R26     equ     26
R27     equ     27
R28     equ     28
R29     equ     29
R30     equ     30
R31     equ     31

LDCTX   equ  [DWORD PTR 0c000h]
STCTX   equ  [0c400h]

;
;   protected mode equates
;
wMOVP   macro   dst, src            ;; 386 memory to WTL reg
    if  _wSreg eq 0
    mov DWORD PTR ds:00400h+(dst*4),src
    endif
    if  _wSreg eq 1
    mov DWORD PTR es:00400h+(dst*4),src
    endif
    if  _wSreg eq 2
    mov DWORD PTR fs:00400h+(dst*4),src
    endif
    if  _wSreg eq 3
    mov DWORD PTR gs:00400h+(dst*4),src
    endif
    endm

wMOV    macro   dst, src            ;; WTL reg to WTL reg (dst = src)
    if  _wSreg eq 0
    mov BYTE PTR ds:00400h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 1
    mov BYTE PTR es:00400h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 2
    mov BYTE PTR fs:00400h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 3
    mov BYTE PTR gs:00400h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    endm

wSTORE  macro   dst, src            ;; WTL reg to 386 memory
    if  _wSreg eq 0
    mov dst,DWORD PTR ds:00c00h+(src*4)
    endif
    if  _wSreg eq 1
    mov dst,DWORD PTR es:00c00h+(src*4)
    endif
    if  _wSreg eq 2
    mov dst,DWORD PTR fs:00c00h+(src*4)
    endif
    if  _wSreg eq 3
    mov dst,DWORD PTR gs:00c00h+(src*4)
    endif
    endm

wLDCTX  macro   src
    if  _wSreg eq 0
    mov ds:LDCTX,src
    endif
    if  _wSreg eq 1
    mov es:LDCTX,src
    endif
    if  _wSreg eq 2
    mov fs:LDCTX,src
    endif
    if  _wSreg eq 3
    mov gs:LDCTX,src
    endif
    endm

wSTCTX  macro   dst
    if  _wSreg eq 0
    mov dst,ds:STCTX
    endif
    if  _wSreg eq 1
    mov dst,es:STCTX
    endif
    if  _wSreg eq 2
    mov dst,fs:STCTX
    endif
    if  _wSreg eq 3
    mov dst,gs:STCTX
    endif
    endm

wADD    macro   dst, src            ;; dst = src + dst
    if  _wSreg eq 0
    mov BYTE PTR ds:00000h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 1
    mov BYTE PTR es:00000h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 2
    mov BYTE PTR fs:00000h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 3
    mov BYTE PTR gs:00000h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    endm

wADDP   macro   dst, src            ;; dst = 386 data + dst
    if  _wSreg eq 0
    mov DWORD PTR ds:00000h+(dst*4),src
    endif
    if  _wSreg eq 1
    mov DWORD PTR es:00000h+(dst*4),src
    endif
    if  _wSreg eq 2
    mov DWORD PTR fs:00000h+(dst*4),src
    endif
    if  _wSreg eq 3
    mov DWORD PTR gs:00000h+(dst*4),src
    endif
    endm

wSUB    macro   dst, src            ;; dst = src - dst
    if  _wSreg eq 0
    mov BYTE PTR ds:01000h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 1
    mov BYTE PTR es:01000h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 2
    mov BYTE PTR fs:01000h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 3
    mov BYTE PTR gs:01000h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    endm

wSUBP   macro   dst, src            ;; dst = 386 data - dst
    if  _wSreg equ 0
    mov DWORD PTR ds:01000h+(dst*4),src
    endif
    if  _wSreg equ 1
    mov DWORD PTR es:01000h+(dst*4),src
    endif
    if  _wSreg equ 2
    mov DWORD PTR fs:01000h+(dst*4),src
    endif
    if  _wSreg equ 3
    mov DWORD PTR gs:01000h+(dst*4),src
    endif
    endm

wMUL    macro   dst, src            ;; dst = src * dst
    if  _wSreg eq 0
    mov BYTE PTR ds:00800h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 1
    mov BYTE PTR es:00800h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 2
    mov BYTE PTR fs:00800h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 3
    mov BYTE PTR gs:00800h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    endm

wMULP   macro   dst, src            ;; dst = 386 data * dst
    if  _wSreg eq 0
    mov DWORD PTR ds:00800h+(dst*4),src
    endif
    if  _wSreg eq 1
    mov DWORD PTR es:00800h+(dst*4),src
    endif
    if  _wSreg eq 2
    mov DWORD PTR fs:00800h+(dst*4),src
    endif
    if  _wSreg eq 3
    mov DWORD PTR gs:00800h+(dst*4),src
    endif
    endm

wDIV    macro   dst, src            ;; dst = src / dst
    if  _wSreg eq 0
    mov BYTE PTR ds:01400h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 1
    mov BYTE PTR es:01400h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 2
    mov BYTE PTR fs:01400h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 3
    mov BYTE PTR gs:01400h+(dst*4)+(src AND 3)+((src AND 1ch) SHL 5),al
    endif
    endm

wDIVP   macro   dst, src            ;; dst = 386 data / dst
    if  _wSreg eq 0
    mov DWORD PTR ds:01400h+(dst*4),src
    endif
    if  _wSreg eq 1
    mov DWORD PTR es:01400h+(dst*4),src
    endif
    if  _wSreg eq 2
    mov DWORD PTR fs:01400h+(dst*4),src
    endif
    if  _wSreg eq 3
    mov DWORD PTR gs:01400h+(dst*4),src
    endif
    endm

wCMP    macro   a, b                ;; a ? b
    if  _wSreg eq 0
    mov BYTE PTR ds:03000h+(b*4)+(a AND 3)+((a AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 1
    mov BYTE PTR es:03000h+(b*4)+(a AND 3)+((a AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 2
    mov BYTE PTR fs:03000h+(b*4)+(a AND 3)+((a AND 1ch) SHL 5),al
    endif
    if  _wSreg eq 3
    mov BYTE PTR gs:03000h+(b*4)+(a AND 3)+((a AND 1ch) SHL 5),al
    endif
    endm

wCMPP   macro   a, mem              ;; 386data ? a
    if  _wSreg eq 0
    mov DWORD PTR ds:03000h+(a*4),mem
    endif
    if  _wSreg eq 1
    mov DWORD PTR es:03000h+(a*4),mem
    endif
    if  _wSreg eq 2
    mov DWORD PTR fs:03000h+(a*4),mem
    endif
    if  _wSreg eq 3
    mov DWORD PTR gs:03000h+(a*4),mem
    endif
    endm

wFLTP   macro   dst, src            ;; dst = float(src)
    if  _wSreg  eq 0
    mov DWORD PTR ds:01c00h+(dst*4),src
    endif
    if  _wSreg  eq 1
    mov DWORD PTR es:01c00h+(dst*4),src
    endif
    if  _wSreg  eq 2
    mov DWORD PTR fs:01c00h+(dst*4),src
    endif
    if  _wSreg  eq 3
    mov DWORD PTR gs:01c00h+(dst*4),src
    endif
    endm


;
;   init Weitek co-processor
;
wINIT   macro
    local   l1, l2

    push    ax

    wLDCTX  0b8000000h              ;; query WTL type
    wSTCTX  ax                      ;; 16MHz or 20MHz?
    and     ah,80h
    jne     short l1

    wLDCTX  016000000h              ; init flowthrough timers of 1164 and 1165
    jmp     short l2

l1:
    wLDCTX  056000000h              ; init 1164 flowthrough timer
    wLDCTX  098000000h              ; init 1165 flowthrough timer

l2:
    wLDCTX  064000000h              ; remainder of power up sequence
    wLDCTX  0A0000000h
    wLDCTX  030000000h
    wLDCTX  001FF0000h              ; round floats, ints to nearest, no ints.

    pop     ax
    endm
